Abhishek Setty
We present a systematic pathway for solving differential equations within the quantum linear systems framework by combining block encoding with Quantum Singular Value Transformation (QSVT). The approach is demonstrated on a complex tridiagonal linear system and extended to problems in computational fluid dynamics: the heat equation with mixed boundary conditions and Carleman-linearized nonlinear Burgers’ equation. Our scaling analysis of the heat equation identifies regimes where classical computation remains feasible and estimates circuit depths required to achieve potential quantum advantage. We further evaluate post-selection success probabilities for the presented examples and provide hardware resource estimates for block encoding and QSVT circuits in terms of two-qubit gate depth, evaluated on IBM superconducting processors with heavy-hex and square lattice topologies. These results highlight both the practical limitations of current hardware and key directions for depth reduction and scalable quantum linear solvers.
Cite as BibTex
@article{Setty_2026,
doi = {10.1088/1751-8121/ae5cef},
url = {https://doi.org/10.1088/1751-8121/ae5cef},
year = {2026},
month = {may},
publisher = {IOP Publishing},
volume = {59},
number = {18},
pages = {185303},
author = {Setty, Abhishek},
title = {A quantum linear systems pathway for solving differential equations},
journal = {Journal of Physics A: Mathematical and Theoretical},
abstract = {We present a systematic pathway for solving differential equations within the quantum linear systems framework by combining block encoding with quantum singular value transformation (QSVT). The approach is demonstrated on a complex tridiagonal linear system and extended to problems in computational fluid dynamics: the heat equation with mixed boundary conditions and Carleman-linearized nonlinear Burgers’ equation. Our scaling analysis of the heat equation identifies regimes where classical computation remains feasible and estimates circuit depths required to achieve potential quantum advantage. We further evaluate post-selection success probabilities for the presented examples and provide hardware resource estimates for block encoding and QSVT circuits in terms of two-qubit gate depth, evaluated on IBM superconducting processors with heavy-hex and square lattice topologies. These results highlight both the practical limitations of current hardware and key directions for depth reduction and scalable quantum linear solvers.}
}